Content Curator | Updated on - Mar 30, 2026

M.Tech (VLSI Design) at Andhra Loyola Institute of Engineering and Technology (ALIET), Vijayawada, is a 2-year full-time postgraduate program affiliated to JNTU Kakinada and approved by AICTE, with a seat intake of 18. The program covers advanced topics in VLSI circuit design, digital systems, embedded systems, and semiconductor technology using industry-standard tools like MATLAB, XILINX, Mentor Graphics, and Tanner EDA. The annual tuition fee is approximately Rs. 50,000, making the total course fee around Rs. 1,00,000 for the entire duration. Admissions are primarily through AP PGECET (Andhra Pradesh Post Graduate Engineering Common Entrance Test) or GATE scores, and the course is popular for its strong ECE department infrastructure, NAAC A+ accreditation, and industry-relevant curriculum.

Admissions for the 2026-27 academic year are upcoming. AP PGECET 2026 registrations are currently open (deadline: March 16, 2026 without late fee). The exam is scheduled for April 28-30, 2026, with results expected by May 14, 2026. Counselling and seat allotment for M.Tech admissions are typically conducted in July-August 2026 based on AP PGECET/GATE scores.

Key Points

NAAC A+ accredited autonomous institution with NBA accreditation for ECE department
State-of-the-art VLSI and Signal Processing Lab equipped with licensed tools: XILINX, Mentor Graphics, Tanner EDA, MATLAB
Intake of 18 seats for M.Tech VLSI Design - one of the few PG programs offered at ALIET
Affiliated to JNTU Kakinada; curriculum aligned with industry and research requirements
Siemens Training Centre on campus for industry-standard automation and digitalization training

Official Link:

Go To Website

Highlights
Fees
Admission
Scholarships
Placements
Cutoff
Ranking
FAQs

ALIET M.Tech VLSI Design Fees

The M.Tech (VLSI Design) program at ALIET is one of the most affordable PG engineering programs in Andhra Pradesh, with an annual tuition fee of approximately Rs. 50,000 as regulated by the Andhra Pradesh Higher Education Regulatory and Monitoring Commission (APHERMC). The total course fee for the 2-year program is around Rs. 1,00,000. Hostel facilities are available on campus separately.

Fee Structure

Fee Component	Year 1	Year 2	Total (2 Years)
Tuition Fee	Rs. 50,000	Rs. 50,000	Rs. 1,00,000
Other Charges (Exam, Library, etc.)	Included	Included	Included
Total Fees (excluding Hostel)	Rs. 50,000	Rs. 50,000	Rs. 1,00,000
Hostel Fees (optional)	Rs. 40,000-50,000/year	Rs. 40,000-50,000/year	Rs. 80,000-1,00,000 (approx.)

Fees are regulated by APHERMC and subject to revision each academic year.
SC/ST/BC students may be eligible for fee reimbursement under the AP government's Jagananna Vidya Deevena scheme.
Hostel accommodation is optional and not included in the total course fee above.
Caution deposit (refundable) may be collected at the time of admission.

ALIET M.Tech VLSI Design Admission 2026

Admissions to M.Tech (VLSI Design) at ALIET are conducted through the AP PGECET centralized counselling process managed by APSCHE. 70% of seats (Convener Quota) are filled through AP PGECET/GATE scores, while the remaining 30% (Management Quota) are filled by the institution based on merit. The AP PGECET 2026 exam is scheduled for April 28-30, 2026, and counselling is expected in July-August 2026. Candidates with valid GATE scores may also apply directly.

ALIET M.Tech Admission Dates

Event	Date
AP PGECET 2026 Application Start	February 6, 2026
AP PGECET 2026 Application Last Date (without late fee)	March 16, 2026
AP PGECET 2026 Application Last Date (with late fee Rs. 1000)	March 20, 2026
AP PGECET 2026 Hall Ticket Download	April 15, 2026
AP PGECET 2026 Exam	April 28-30, 2026
AP PGECET 2026 Preliminary Key Release	May 6, 2026
AP PGECET 2026 Results	May 14, 2026
M.Tech Counselling / Web Options (Tentative)	July 2026
Seat Allotment (Tentative)	August 2026
Batch Commencement (Tentative)	September 2026

Entrance Exam Dates

Exam	Event	Date
GATE 2026	Registration Start	August 28, 2025
GATE 2026	Registration End	October 13, 2025
GATE 2026	Admit Card	January 13, 2026
GATE 2026	Exam	February 7, 8, 14, 15, 2026
GATE 2026	Result	March 19, 2026
AP PGECET 2026	Application Start	February 6, 2026
AP PGECET 2026	Last Date (without late fee)	March 16, 2026
AP PGECET 2026	Hall Ticket	April 15, 2026
AP PGECET 2026	Exam	April 28-30, 2026
AP PGECET 2026	Result	May 14, 2026

The dates mentioned above are tentative and subject to change.

Eligibility Criteria:

Candidates must hold a B.E./B.Tech degree in Electronics and Communication Engineering (ECE), Electrical and Electronics Engineering (EEE), or equivalent discipline from a recognized university.
Minimum 50% aggregate marks in the qualifying degree (45% for SC/ST candidates).
Valid AP PGECET rank or GATE score in the relevant paper (EC - Electronics and Communication Engineering).

Admission Process:

Register and appear for AP PGECET 2026 (or use valid GATE score)
Check AP PGECET results and rank card
Participate in AP PGECET web counselling - register, pay counselling fee, and enter web options
Attend certificate verification at designated help line centres
Receive seat allotment and report to ALIET with original documents
Pay tuition fee and complete admission formalities at the college
Management Quota (30%) seats: Apply directly to ALIET; merit list prepared from applications received

ALIET M.Tech VLSI Design Scholarships 2026

Students admitted to M.Tech (VLSI Design) at ALIET can avail several government-sponsored scholarships and fee reimbursement schemes. The Andhra Pradesh government's Jagananna Vidya Deevena scheme is the primary support mechanism, covering full tuition fee reimbursement for eligible SC, ST, BC, EBC, and minority students. Additionally, national-level scholarships through the National Scholarship Portal (NSP) are available for meritorious and economically weaker students.

Scholarship Details

Scholarship	Eligibility	Amount	Provider
Jagananna Vidya Deevena (Fee Reimbursement)	SC/ST/BC/EBC/Minority students; parental income below prescribed limit	Full tuition fee reimbursement	Government of Andhra Pradesh
Post Matric Scholarship (SC)	SC students; parental income below Rs. 2.5 lakh/year	Full tuition fee + maintenance allowance	Government of Andhra Pradesh / NSP
Post Matric Scholarship (ST)	ST students; parental income below Rs. 2.5 lakh/year	Full tuition fee + maintenance allowance	Government of Andhra Pradesh / NSP
PM YASASVI Scholarship	OBC/EBC/DNT students; income below Rs. 2.5 lakh/year	Up to Rs. 75,000/year	Ministry of Social Justice, Govt. of India
Merit-cum-Means Scholarship (Minority)	Minority community students; income below Rs. 2.5 lakh/year	Up to Rs. 30,000/year	Ministry of Minority Affairs, Govt. of India

Applications for government scholarships are typically submitted through the AP government's scholarship portal or NSP (scholarships.gov.in).
Deadlines for scholarship applications are usually announced at the start of each academic year (typically October-November).
Students must submit income certificates, caste certificates, and other documents at the time of admission to avail these scholarships.
Scholarship amounts are subject to revision by the respective government authorities.

ALIET M.Tech VLSI Design Placement 2026

Placement Support

Placement Information	Details
Dedicated Placement Cell	Connects students with IT and core engineering companies
Sectors	Semiconductor, embedded systems, and communication sectors
Facilities	Industry tie-ups and Siemens Training Centre provide additional exposure
M.Tech VLSI Specific Data	Not separately published

ALIET M.Tech Vlsi Design Ranking

Indiatoday Ranking

#253 out of 254 in India 2020

#20th in Andhra Pradesh

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ALIET M.Tech VLSI Design FAQs

Ques. Is GATE score mandatory for M.Tech VLSI Design admission at ALIET, or can I apply with AP PGECET rank?

Ans. Both GATE and AP PGECET scores are accepted for M.Tech admissions at ALIET. For the Convener Quota (70% seats), AP PGECET rank is the primary criterion. However, candidates with valid GATE scores in EC paper can also apply and may be given preference during counselling. GATE-qualified candidates can register separately during the GATE/GPAT counselling phase.

Ques. What is the actual intake for M.Tech VLSI Design at ALIET and how competitive is admission?

Ans. The sanctioned intake for M.Tech VLSI Design at ALIET is 18 seats. Given the small intake, competition can be moderate to high depending on the AP PGECET rank. Candidates with a rank within the top 500-1000 in the ECE paper generally have a good chance of securing admission.

Ques. What software tools and labs are available for M.Tech VLSI students at ALIET?

Ans. The ECE department at ALIET has a dedicated VLSI and Signal Processing Lab equipped with licensed software including MATLAB, XILINX (for FPGA design), Mentor Graphics, Tanner EDA (for analog/mixed-signal design), and Code Composer Studio. These are industry-standard tools widely used in semiconductor and chip design companies.

Ques. Does ALIET offer any placement support specifically for M.Tech VLSI graduates?

Ans. ALIET has a dedicated placement cell that connects students with IT and core engineering companies. While specific M.Tech VLSI placement data is not separately published, ECE graduates from ALIET have been placed in companies across the semiconductor, embedded systems, and communication sectors. The college's industry tie-ups and Siemens Training Centre also provide additional exposure.

Ques. Can students from other states apply for M.Tech VLSI Design at ALIET through the Management Quota?

Ans. Yes, students from other states can apply for the Management Quota (B-category, 30% seats) at ALIET. These seats are filled by the institution based on merit, considering JEE Main ranks or qualifying exam marks. Candidates must have at least 45% marks in the qualifying degree (40% for reserved categories). Applications are invited through advertisements in regional newspapers and the college website.

Ques. What is the medium of instruction and are there any part-time or distance options for M.Tech VLSI at ALIET?

Ans. The M.Tech (VLSI Design) program at ALIET is offered exclusively as a full-time, on-campus program. The medium of instruction is English. There is no part-time or distance learning option available for this course at ALIET. Students are expected to attend regular classes, lab sessions, and seminars throughout the 2-year program.